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Welcome to Bitwise
0:02Welcome to the inaugural stream for Bitwise
0:02Welcome to the inaugural stream for Bitwise
0:02Welcome to the inaugural stream for Bitwise
0:55Links to the Repository1, Overview, with Links2 and FAQ3
0:55Links to the Repository1, Overview, with Links2 and FAQ3
0:55Links to the Repository1, Overview, with Links2 and FAQ3
2:41Major FAQ items, Q: What is Bitwise?
2:41Major FAQ items, Q: What is Bitwise?
2:41Major FAQ items, Q: What is Bitwise?
9:08Q: Who are you?
9:08Q: Who are you?
9:08Q: Who are you?
10:39Q: What license is it released under?
10:39Q: What license is it released under?
10:39Q: What license is it released under?
11:27Q: What do I need to know in advance to follow along?
11:27Q: What do I need to know in advance to follow along?
11:27Q: What do I need to know in advance to follow along?
13:11Q: Do I need to spend money on hardware?
13:11Q: Do I need to spend money on hardware?
13:11Q: Do I need to spend money on hardware?
15:44Q: How much time should I expect to spend per week to keep up?
15:44Q: How much time should I expect to spend per week to keep up?
15:44Q: How much time should I expect to spend per week to keep up?
19:56Q: What languages will we be using?
19:56Q: What languages will we be using?
19:56Q: What languages will we be using?
23:42Q: What major supporting software is required?4,5
23:42Q: What major supporting software is required?4,5
23:42Q: What major supporting software is required?4,5
26:00Feasibility, sustainability and burnout, and the phases of the project
26:00Feasibility, sustainability and burnout, and the phases of the project
26:00Feasibility, sustainability and burnout, and the phases of the project
32:58Next steps, starting on the compiler
32:58Next steps, starting on the compiler
32:58Next steps, starting on the compiler
33:28Q&A
33:28Q&A
33:28Q&A
34:33mistyr0se pervognsen Do you have an idea of the kind of OS you're going to be making? A Unix clone?
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34:33mistyr0se pervognsen Do you have an idea of the kind of OS you're going to be making? A Unix clone?
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34:33mistyr0se pervognsen Do you have an idea of the kind of OS you're going to be making? A Unix clone?
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36:41badcodeshane pervognsen You mentioned that fluency in C is a requirement. Presumably very little will be syntax dependent and you just mean "fluency in systems level programming", and I'll just be able to coast by with fluency in Rust instead?
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36:41badcodeshane pervognsen You mentioned that fluency in C is a requirement. Presumably very little will be syntax dependent and you just mean "fluency in systems level programming", and I'll just be able to coast by with fluency in Rust instead?
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36:41badcodeshane pervognsen You mentioned that fluency in C is a requirement. Presumably very little will be syntax dependent and you just mean "fluency in systems level programming", and I'll just be able to coast by with fluency in Rust instead?
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37:37godling72 pervognsen For the compiler, are you going to use an existing RV32I emulator for testing?
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37:37godling72 pervognsen For the compiler, are you going to use an existing RV32I emulator for testing?
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37:37godling72 pervognsen For the compiler, are you going to use an existing RV32I emulator for testing?
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38:32c__jm pervognsen Have you looked at JAI from Jon Blow very much?
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38:32c__jm pervognsen Have you looked at JAI from Jon Blow very much?
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38:32c__jm pervognsen Have you looked at JAI from Jon Blow very much?
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39:47pragmascrypt pervognsen Any specific reason to using Verilog over VHDL for compile target? VHDL seems to be a bit more popular with FPGAs
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39:47pragmascrypt pervognsen Any specific reason to using Verilog over VHDL for compile target? VHDL seems to be a bit more popular with FPGAs
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39:47pragmascrypt pervognsen Any specific reason to using Verilog over VHDL for compile target? VHDL seems to be a bit more popular with FPGAs
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40:45badcodeshane pervognsen Will you be supporting UEFI?
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40:45badcodeshane pervognsen Will you be supporting UEFI?
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40:45badcodeshane pervognsen Will you be supporting UEFI?
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41:01pixelpoet pervognsen 0. How long until I can write some small graphics demos for the computer, e.g. ray tracers? 1. Would it be possible to get a "max performance" mode without memory virtualisation / page tables, preemption?
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41:01pixelpoet pervognsen 0. How long until I can write some small graphics demos for the computer, e.g. ray tracers? 1. Would it be possible to get a "max performance" mode without memory virtualisation / page tables, preemption?
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41:01pixelpoet pervognsen 0. How long until I can write some small graphics demos for the computer, e.g. ray tracers? 1. Would it be possible to get a "max performance" mode without memory virtualisation / page tables, preemption?
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42:25onebloke pervognsen Do you plan for the CPU and OS to be multicore?
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42:25onebloke pervognsen Do you plan for the CPU and OS to be multicore?
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42:25onebloke pervognsen Do you plan for the CPU and OS to be multicore?
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43:49badcodeshane pervognsen Can I just say how excited I am to see you kicking off this project? As someone who didn't attend university, it's hard to break into things like compiler design and firmware programming, so this could be a great resource for people like myself to become acquainted with these more abstract, esoteric topics
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43:49badcodeshane pervognsen Can I just say how excited I am to see you kicking off this project? As someone who didn't attend university, it's hard to break into things like compiler design and firmware programming, so this could be a great resource for people like myself to become acquainted with these more abstract, esoteric topics
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43:49badcodeshane pervognsen Can I just say how excited I am to see you kicking off this project? As someone who didn't attend university, it's hard to break into things like compiler design and firmware programming, so this could be a great resource for people like myself to become acquainted with these more abstract, esoteric topics
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44:51markajohnson pervognsen Not directly relevant to the content you're presenting, but what time zone are you in?
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44:51markajohnson pervognsen Not directly relevant to the content you're presenting, but what time zone are you in?
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🎲
44:51markajohnson pervognsen Not directly relevant to the content you're presenting, but what time zone are you in?
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🎲
45:22heroickatora pervognsen Do you intend to include the community in development, e.g. discussion groups on some interfaces, taking pull requests?
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45:22heroickatora pervognsen Do you intend to include the community in development, e.g. discussion groups on some interfaces, taking pull requests?
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45:22heroickatora pervognsen Do you intend to include the community in development, e.g. discussion groups on some interfaces, taking pull requests?
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47:45heasummn What HDL will you be using to create the CPU?
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47:45heasummn What HDL will you be using to create the CPU?
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47:45heasummn What HDL will you be using to create the CPU?
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48:44pmttavara pervognsen As the project progresses do you foresee any problems with backwards compatibility, e.g. breaking changes for community-driven projects?
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48:44pmttavara pervognsen As the project progresses do you foresee any problems with backwards compatibility, e.g. breaking changes for community-driven projects?
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48:44pmttavara pervognsen As the project progresses do you foresee any problems with backwards compatibility, e.g. breaking changes for community-driven projects?
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50:15mistyr0se pervognsen How long do you think the stream will go on for?
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50:15mistyr0se pervognsen How long do you think the stream will go on for?
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50:15mistyr0se pervognsen How long do you think the stream will go on for?
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51:24filiadelski pervognsen How do we support you?
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51:24filiadelski pervognsen How do we support you?
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51:24filiadelski pervognsen How do we support you?
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53:25nyear How often will you stream? Every day?
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53:25nyear How often will you stream? Every day?
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53:25nyear How often will you stream? Every day?
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54:05jprzemieniecki pervognsen Is the project supposed to be mimicking state-of-the-art but with corners cut, or just an example way to do things? For example, is the compiler planned with the SSA IR the way compilers seem to prefer, or more like something from a dragon's book?
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54:05jprzemieniecki pervognsen Is the project supposed to be mimicking state-of-the-art but with corners cut, or just an example way to do things? For example, is the compiler planned with the SSA IR the way compilers seem to prefer, or more like something from a dragon's book?
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54:05jprzemieniecki pervognsen Is the project supposed to be mimicking state-of-the-art but with corners cut, or just an example way to do things? For example, is the compiler planned with the SSA IR the way compilers seem to prefer, or more like something from a dragon's book?
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57:16badcodeshane By targeting a hardware description language, the OS will be virtualised, right? I'll be able to run it within VirtualBox or something similar?
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57:16badcodeshane By targeting a hardware description language, the OS will be virtualised, right? I'll be able to run it within VirtualBox or something similar?
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57:16badcodeshane By targeting a hardware description language, the OS will be virtualised, right? I'll be able to run it within VirtualBox or something similar?
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58:38pmttavara pervognsen Someone in discord asked: Will you code your own DDR3 controller or will you use the FPGA's one?
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58:38pmttavara pervognsen Someone in discord asked: Will you code your own DDR3 controller or will you use the FPGA's one?
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58:38pmttavara pervognsen Someone in discord asked: Will you code your own DDR3 controller or will you use the FPGA's one?
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59:38eddywm You're on Windows. Can folks on Linux be assured to find these tools that are needed?
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59:38eddywm You're on Windows. Can folks on Linux be assured to find these tools that are needed?
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59:38eddywm You're on Windows. Can folks on Linux be assured to find these tools that are needed?
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1:00:48riskyfive I designed an SDRAM controller for the Papilio Pro (Spartan 6 LX9), but I had to add an additional cycle of latency. Do you have an oscilloscope to look at the memory signals?
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1:00:48riskyfive I designed an SDRAM controller for the Papilio Pro (Spartan 6 LX9), but I had to add an additional cycle of latency. Do you have an oscilloscope to look at the memory signals?
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1:00:48riskyfive I designed an SDRAM controller for the Papilio Pro (Spartan 6 LX9), but I had to add an additional cycle of latency. Do you have an oscilloscope to look at the memory signals?
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1:02:11symbolic_butt pervognsen I just came in, sorry if this was said before but the sound is super low
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1:02:11symbolic_butt pervognsen I just came in, sorry if this was said before but the sound is super low
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1:02:11symbolic_butt pervognsen I just came in, sorry if this was said before but the sound is super low
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1:02:31doomguyfieri Have you already decided what FPGA will be used, or is that a decision that will be made later?
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1:02:31doomguyfieri Have you already decided what FPGA will be used, or is that a decision that will be made later?
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1:02:31doomguyfieri Have you already decided what FPGA will be used, or is that a decision that will be made later?
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1:03:24nuttynutnutnutter pervognsen You can rent high-end oscilloscopes on a short-term basis, if necessary
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1:03:24nuttynutnutnutter pervognsen You can rent high-end oscilloscopes on a short-term basis, if necessary
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1:03:24nuttynutnutnutter pervognsen You can rent high-end oscilloscopes on a short-term basis, if necessary
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1:04:03badcodeshane Will you be going offline after the Q&A or getting started?
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1:04:03badcodeshane Will you be going offline after the Q&A or getting started?
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1:04:03badcodeshane Will you be going offline after the Q&A or getting started?
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1:04:24godling72 pervognsen The non high-end oscilloscope version would be educational
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1:04:24godling72 pervognsen The non high-end oscilloscope version would be educational
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1:04:24godling72 pervognsen The non high-end oscilloscope version would be educational
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1:05:37nuttynutnutnutter pervognsen: Maybe you mentioned it (I missed the first ~30 minutes of the stream), but it sounds like you're going to be doing a PCB design also? If so, Kicad, Altium, OrCad, Eagle, etc?
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1:05:37nuttynutnutnutter pervognsen: Maybe you mentioned it (I missed the first ~30 minutes of the stream), but it sounds like you're going to be doing a PCB design also? If so, Kicad, Altium, OrCad, Eagle, etc?
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1:05:37nuttynutnutnutter pervognsen: Maybe you mentioned it (I missed the first ~30 minutes of the stream), but it sounds like you're going to be doing a PCB design also? If so, Kicad, Altium, OrCad, Eagle, etc?
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1:06:14jim0_o pervognsen I don't know much about FPGAs so I wonder, is it considered something for prototyping or is it meant to be used in finished products?
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1:06:14jim0_o pervognsen I don't know much about FPGAs so I wonder, is it considered something for prototyping or is it meant to be used in finished products?
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1:06:14jim0_o pervognsen I don't know much about FPGAs so I wonder, is it considered something for prototyping or is it meant to be used in finished products?
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1:08:59kryu pervognsen Would you consider doing an upfront brain-dump doc of some of the references, books and such, that you've found worth the time related to the topics within the scope of the project?
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1:08:59kryu pervognsen Would you consider doing an upfront brain-dump doc of some of the references, books and such, that you've found worth the time related to the topics within the scope of the project?
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1:08:59kryu pervognsen Would you consider doing an upfront brain-dump doc of some of the references, books and such, that you've found worth the time related to the topics within the scope of the project?
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1:09:45Stop the stream now
1:09:45Stop the stream now
1:09:45Stop the stream now