Jump to Content
Register Log in

Bitwise
Blog
Forums
Episode Guide
twitter
We are currently in the process of converting the website to the new design. Some pages, like this one, are still broken. We appreciate your patience.
Bitwise»Episode Guide
RISC-V Dynamic Assembler, Part 2
References ▼
Andrew Waterman and Krste Asanović
The RISC-V Instruction Set Manual - Volume 1: User-Level ISA
[1]18:39
GitHub
mamedev /​ mame
[2]46:48
Sega Retro
Sega X Board
[3]46:48
Filter mode:
Topics
asm
code generation
emulation
input handling
memory
peripheral
(null topic)
Media
🗪Chat Comment
🏃In-Game
🖮Programming🟉
📖Research
🗩Speech
🎭
🏟
🔗
Link to: current timestamp
Credits
Host
Per Vognsen
Indexer
Matt Mascarenhas
?
?

Keyboard Navigation

Global Keys

[, < / ], > Jump to previous / next episode
W, K, P / S, J, N Jump to previous / next marker
t / T Toggle theatre / SUPERtheatre mode
V Revert filter to original state Y Select link (requires manual Ctrl-c)

Menu toggling

q Quotes r References f Filter y Link c Credits

In-Menu Movement

a
w
s
d
h j k l
←
↑
↓
→

Quotes and References Menus

Enter Jump to timecode

Quotes, References and Credits Menus

o Open URL (in new tab)

Filter Menu

x, Space Toggle category and focus next
X, ShiftSpace Toggle category and focus previous
v Invert topics / media as per focus

Filter and Link Menus

z Toggle filter / linking mode

Credits Menu

Enter Open URL (in new tab)
0:07Recap and set the stage for the day
🗩
0:07Recap and set the stage for the day
🗩
0:07Recap and set the stage for the day
🗩
1:03Review the current functionality of our dynamic assembler
📖
1:03Review the current functionality of our dynamic assembler
📖
1:03Review the current functionality of our dynamic assembler
📖
8:05Explain symbol allocation and back-patching
📖
8:05Explain symbol allocation and back-patching
📖
8:05Explain symbol allocation and back-patching
📖
18:39Review bug fix in S-immediate encoding, and the introduction of asm_la() asm_branch() and asm_j()1
📖
18:39Review bug fix in S-immediate encoding, and the introduction of asm_la() asm_branch() and asm_j()1
📖
18:39Review bug fix in S-immediate encoding, and the introduction of asm_la() asm_branch() and asm_j()1
📖
22:38Q&A
🗩
22:38Q&A
🗩
22:38Q&A
🗩
22:49xanatos387 Hum is coming and going, when you move your head around, I think
🗪
22:49xanatos387 Hum is coming and going, when you move your head around, I think
🗪
22:49xanatos387 Hum is coming and going, when you move your head around, I think
🗪
23:43Determine to implement basic memory-mapped I/O
🗩
23:43Determine to implement basic memory-mapped I/O
🗩
23:43Determine to implement basic memory-mapped I/O
🗩
24:54Memory-mapped I/O in emulators
🗩
24:54Memory-mapped I/O in emulators
🗩
24:54Memory-mapped I/O in emulators
🗩
28:19Abstract out the RAM handling from Hart into a new Bus struct, and propagate this change
28:19Abstract out the RAM handling from Hart into a new Bus struct, and propagate this change
28:19Abstract out the RAM handling from Hart into a new Bus struct, and propagate this change
36:08Run it to see that it still works
🏃
36:08Run it to see that it still works
🏃
36:08Run it to see that it still works
🏃
36:27Implement memory-mapped I/O, hard-coded for now, enabling bus_load_word() and bus_store_word() to call getchar() and putchar() respectively
36:27Implement memory-mapped I/O, hard-coded for now, enabling bus_load_word() and bus_store_word() to call getchar() and putchar() respectively
36:27Implement memory-mapped I/O, hard-coded for now, enabling bus_load_word() and bus_store_word() to call getchar() and putchar() respectively
40:36Try to perform a asm_lw_imm(asm, X5, GETCHAR_ADDR)
40:36Try to perform a asm_lw_imm(asm, X5, GETCHAR_ADDR)
40:36Try to perform a asm_lw_imm(asm, X5, GETCHAR_ADDR)
41:11Run it to see what it does
🏃
41:11Run it to see what it does
🏃
41:11Run it to see what it does
🏃
41:46Remove the get_char() from main() and introduce pseudo-instructions asm_get_char() and asm_put_char() to exercise our memory-mapped I/O
41:46Remove the get_char() from main() and introduce pseudo-instructions asm_get_char() and asm_put_char() to exercise our memory-mapped I/O
41:46Remove the get_char() from main() and introduce pseudo-instructions asm_get_char() and asm_put_char() to exercise our memory-mapped I/O
44:18Add asm_getchar() and asm_putchar() calls in main()
44:18Add asm_getchar() and asm_putchar() calls in main()
44:18Add asm_getchar() and asm_putchar() calls in main()
44:45Run the simulator to see its infinite output
🏃
44:45Run the simulator to see its infinite output
🏃
44:45Run the simulator to see its infinite output
🏃
45:02Call get_char() in the main loop
45:02Call get_char() in the main loop
45:02Call get_char() in the main loop
45:08Run it, press 'x' and see X5 get populated with 120
🏃
45:08Run it, press 'x' and see X5 get populated with 120
🏃
45:08Run it, press 'x' and see X5 get populated with 120
🏃
45:33Remove both getchar() and print_hart_state() from the main loop, and add a repeat label and asm_j() to our assembly
45:33Remove both getchar() and print_hart_state() from the main loop, and add a repeat label and asm_j() to our assembly
45:33Remove both getchar() and print_hart_state() from the main loop, and add a repeat label and asm_j() to our assembly
46:37Run it to try our echo-loop
🏃
46:37Run it to try our echo-loop
🏃
46:37Run it to try our echo-loop
🏃
46:48A few words on our memory-mapped I/O, with a mention of mame2 and the Sega X Board3
🗩
46:48A few words on our memory-mapped I/O, with a mention of mame2 and the Sega X Board3
🗩
46:48A few words on our memory-mapped I/O, with a mention of mame2 and the Sega X Board3
🗩
54:46Consider moving on to doing an RPN (Reverse Polish notation) to RISC-V code generator
🗩
54:46Consider moving on to doing an RPN (Reverse Polish notation) to RISC-V code generator
🗩
54:46Consider moving on to doing an RPN (Reverse Polish notation) to RISC-V code generator
🗩
56:46RPN to RISC-V code generation
🗩
56:46RPN to RISC-V code generation
🗩
56:46RPN to RISC-V code generation
🗩
58:06Introduce gen_rpn() (and necessary functions) as an RPN to RISC-V code generator
58:06Introduce gen_rpn() (and necessary functions) as an RPN to RISC-V code generator
58:06Introduce gen_rpn() (and necessary functions) as an RPN to RISC-V code generator
1:18:30Try out our gen_rpn()
1:18:30Try out our gen_rpn()
1:18:30Try out our gen_rpn()
1:20:11Step through gen_rpn() to see what it does
🏃
1:20:11Step through gen_rpn() to see what it does
🏃
1:20:11Step through gen_rpn() to see what it does
🏃
1:22:25Print out the registers in the main loop
1:22:25Print out the registers in the main loop
1:22:25Print out the registers in the main loop
1:22:31Run it to follow what gen_rpn() does
🏃
1:22:31Run it to follow what gen_rpn() does
🏃
1:22:31Run it to follow what gen_rpn() does
🏃
1:24:47Enable gen_rpn() to push the correct decimal values of our ASCII characters
1:24:47Enable gen_rpn() to push the correct decimal values of our ASCII characters
1:24:47Enable gen_rpn() to push the correct decimal values of our ASCII characters
1:27:21Run it to see that it pushes the correct values
🏃
1:27:21Run it to see that it pushes the correct values
🏃
1:27:21Run it to see that it pushes the correct values
🏃
1:27:44Try to make gen_rpn() generate the code for a +2
1:27:44Try to make gen_rpn() generate the code for a +2
1:27:44Try to make gen_rpn() generate the code for a +2
1:28:01Run it to see that it computes it correctly, but prints out an extra character
🏃
1:28:01Run it to see that it computes it correctly, but prints out an extra character
🏃
1:28:01Run it to see that it computes it correctly, but prints out an extra character
🏃
1:29:09Make bus_load_word() eat '\n'
1:29:09Make bus_load_word() eat '\n'
1:29:09Make bus_load_word() eat '\n'
1:30:00Run it to see that it looks good
🏃
1:30:00Run it to see that it looks good
🏃
1:30:00Run it to see that it looks good
🏃
1:30:26Make gen_rpn() insert '\n' after each digit
1:30:26Make gen_rpn() insert '\n' after each digit
1:30:26Make gen_rpn() insert '\n' after each digit
1:31:12Run it to see that nicer printout
🏃
1:31:12Run it to see that nicer printout
🏃
1:31:12Run it to see that nicer printout
🏃
1:31:16Introduce a duplication character in gen_rpn()
1:31:16Introduce a duplication character in gen_rpn()
1:31:16Introduce a duplication character in gen_rpn()
1:31:59Run it to see how that works
🏃
1:31:59Run it to see how that works
🏃
1:31:59Run it to see how that works
🏃
1:32:13Reflect on our RPN to RISC-V generator
🗩
1:32:13Reflect on our RPN to RISC-V generator
🗩
1:32:13Reflect on our RPN to RISC-V generator
🗩
1:32:57Try to make gen_rpn() calculate the digit-wise complement
1:32:57Try to make gen_rpn() calculate the digit-wise complement
1:32:57Try to make gen_rpn() calculate the digit-wise complement
1:33:22Run it to see that it works
🏃
1:33:22Run it to see that it works
🏃
1:33:22Run it to see that it works
🏃
1:33:32That's it for today, and likely also next week to write articles
🗩
1:33:32That's it for today, and likely also next week to write articles
🗩
1:33:32That's it for today, and likely also next week to write articles
🗩