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Bitwise»Episode Guide
How To Program Assembly Language
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Andrew Waterman and Krste Asanović
The RISC-V Instruction Set Manual - Volume 1: User-Level ISA
[1]1:14:38[2]1:27:09[3]1:29:32
[4]1:33:06
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Per Vognsen
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0:08Set the stage for the promised stream
0:08Set the stage for the promised stream
0:08Set the stage for the promised stream
1:10Disclaimer: Our handwritten assembly likely won't outperform an optimising compiler; writing assembly gives us a soft-intro to machine code generation
1:10Disclaimer: Our handwritten assembly likely won't outperform an optimising compiler; writing assembly gives us a soft-intro to machine code generation
1:10Disclaimer: Our handwritten assembly likely won't outperform an optimising compiler; writing assembly gives us a soft-intro to machine code generation
5:54The approach we'll be taking, translating C to assembly
5:54The approach we'll be taking, translating C to assembly
5:54The approach we'll be taking, translating C to assembly
7:27Goal: Translate from C to assembly language, with thoughts on variable width operations, and RISC-V as a compare-and-branch language
7:27Goal: Translate from C to assembly language, with thoughts on variable width operations, and RISC-V as a compare-and-branch language
7:27Goal: Translate from C to assembly language, with thoughts on variable width operations, and RISC-V as a compare-and-branch language
11:40Idea: Gradually lower C towards target language
11:40Idea: Gradually lower C towards target language
11:40Idea: Gradually lower C towards target language
13:09Example: Lowering a pointer increment from C to assembly, through a process of language feature dependency removal
13:09Example: Lowering a pointer increment from C to assembly, through a process of language feature dependency removal
13:09Example: Lowering a pointer increment from C to assembly, through a process of language feature dependency removal
21:44Features in C that may not be available in an assembly language
21:44Features in C that may not be available in an assembly language
21:44Features in C that may not be available in an assembly language
32:49elavid More missing operations: modulo, floating point stuff, greater-than-or-equal
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32:49elavid More missing operations: modulo, floating point stuff, greater-than-or-equal
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32:49elavid More missing operations: modulo, floating point stuff, greater-than-or-equal
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32:56More "missing" operations
32:56More "missing" operations
32:56More "missing" operations
36:13Local variables
36:13Local variables
36:13Local variables
47:08Smaller-than-word variables have to live in word-sized registers and use word-sized ops
47:08Smaller-than-word variables have to live in word-sized registers and use word-sized ops
47:08Smaller-than-word variables have to live in word-sized registers and use word-sized ops
53:38Naively lowering an implicitly cast smaller-than-word arithmetic operation from C to assembly
53:38Naively lowering an implicitly cast smaller-than-word arithmetic operation from C to assembly
53:38Naively lowering an implicitly cast smaller-than-word arithmetic operation from C to assembly
1:02:56A note on the pessimism of this conversion
1:02:56A note on the pessimism of this conversion
1:02:56A note on the pessimism of this conversion
1:05:17Eliding zero / sign extension when working in architectures with sub-word store-to-memory operations, such as RISC-V
1:05:17Eliding zero / sign extension when working in architectures with sub-word store-to-memory operations, such as RISC-V
1:05:17Eliding zero / sign extension when working in architectures with sub-word store-to-memory operations, such as RISC-V
1:11:43tomas99batista Do you like assembly, pervognsen?
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1:11:43tomas99batista Do you like assembly, pervognsen?
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1:11:43tomas99batista Do you like assembly, pervognsen?
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1:12:52Operating on larger-than-word-sized data types
1:12:52Operating on larger-than-word-sized data types
1:12:52Operating on larger-than-word-sized data types
1:14:10xanatos387 How does this extend for 64-bit or 128-bit RISC-V variants? I assume you have to treat 32-bit memory operations as sub-word and potentially even 64-bit operations. Trying to think that through. The instruction formats are the same. Is it possible to write "CPU 32 / 64 / 128-bit portable" RISC-V ASM?
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1:14:10xanatos387 How does this extend for 64-bit or 128-bit RISC-V variants? I assume you have to treat 32-bit memory operations as sub-word and potentially even 64-bit operations. Trying to think that through. The instruction formats are the same. Is it possible to write "CPU 32 / 64 / 128-bit portable" RISC-V ASM?
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1:14:10xanatos387 How does this extend for 64-bit or 128-bit RISC-V variants? I assume you have to treat 32-bit memory operations as sub-word and potentially even 64-bit operations. Trying to think that through. The instruction formats are the same. Is it possible to write "CPU 32 / 64 / 128-bit portable" RISC-V ASM?
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1:14:384.2 Integer Computational Instructions1
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1:14:384.2 Integer Computational Instructions1
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1:14:384.2 Integer Computational Instructions1
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1:18:02Architecture-specific larger-than-word-sized arithmetic operations, with and without a carry flag
1:18:02Architecture-specific larger-than-word-sized arithmetic operations, with and without a carry flag
1:18:02Architecture-specific larger-than-word-sized arithmetic operations, with and without a carry flag
1:27:09elavid Section 2.4 of the RISC-V instruction set has code for detecting overflow. Looks like it uses BLTU2
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1:27:09elavid Section 2.4 of the RISC-V instruction set has code for detecting overflow. Looks like it uses BLTU2
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1:27:09elavid Section 2.4 of the RISC-V instruction set has code for detecting overflow. Looks like it uses BLTU2
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1:27:45RISC-V MULH / MULHU multiply instructions
1:27:45RISC-V MULH / MULHU multiply instructions
1:27:45RISC-V MULH / MULHU multiply instructions
1:29:326.2 Division Operations3
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1:29:326.2 Division Operations3
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1:29:326.2 Division Operations3
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1:30:51Summarise the topics covered
1:30:51Summarise the topics covered
1:30:51Summarise the topics covered
1:31:41xanatos387 Kind of unfortunate to not be able to do a double-width arithmetic without a branch, though
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1:31:41xanatos387 Kind of unfortunate to not be able to do a double-width arithmetic without a branch, though
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1:31:41xanatos387 Kind of unfortunate to not be able to do a double-width arithmetic without a branch, though
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1:33:06xanatos387 Since we're building our own, do you get tempted to "add" nonstandard missing operations?4
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1:33:06xanatos387 Since we're building our own, do you get tempted to "add" nonstandard missing operations?4
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1:33:06xanatos387 Since we're building our own, do you get tempted to "add" nonstandard missing operations?4
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1:34:24captainpepperoni Assembly is a lower level language, right?
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1:34:24captainpepperoni Assembly is a lower level language, right?
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1:34:24captainpepperoni Assembly is a lower level language, right?
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1:34:55That's it for today, with a glimpse into the future
1:34:55That's it for today, with a glimpse into the future
1:34:55That's it for today, with a glimpse into the future