Logic Design, Part 3
?
?

## Global Keys

W, K, P / S, J, N Jump to previous / next marker
t / T Toggle theatre / SUPERtheatre mode
V Revert filter to original state Y Select link (requires manual Ctrl-c)

q Quotes r References f Filter y Link c Credits

a
w
s
d
h j k l

## Quotes, References and Credits Menus

o Open URL (in new tab)

x, Space Toggle category and focus next
X, ShiftSpace Toggle category and focus previous
v Invert topics / media as per focus

z Toggle filter / linking mode

Enter Open URL (in new tab)
0:01Recap and set the stage for the day
🗩
0:01Recap and set the stage for the day
🗩
0:01Recap and set the stage for the day
🗩
1:17Consider the balanced reduction tree of our XOR circuit
🏃
1:17Consider the balanced reduction tree of our XOR circuit
🏃
1:17Consider the balanced reduction tree of our XOR circuit
🏃
1:46Associativity
🗩
1:46Associativity
🗩
1:46Associativity
🗩
2:53Delay and circuit depth
🏃
2:53Delay and circuit depth
🏃
2:53Delay and circuit depth
🏃
3:40Compare the linearly- and logarithmically-reduced XOR circuit
🏃
3:40Compare the linearly- and logarithmically-reduced XOR circuit
🏃
3:40Compare the linearly- and logarithmically-reduced XOR circuit
🏃
6:19Demo minimum_delay_reduce() which changes the order in which elements are combined
🏃
6:19Demo minimum_delay_reduce() which changes the order in which elements are combined
🏃
6:19Demo minimum_delay_reduce() which changes the order in which elements are combined
🏃
9:44How minimum_delay_reduce() works
📖
9:44How minimum_delay_reduce() works
📖
9:44How minimum_delay_reduce() works
📖
11:54 Is that based on the length of the trace, or something else?
🗪
11:54 Is that based on the length of the trace, or something else?
🗪
11:54 Is that based on the length of the trace, or something else?
🗪
14:10 xanatos387 The source of the delay is that, in general, other signals are not immediately available: they come out of other combinatorial circuits. So you care about the total delay since the last flip-flop (or similar)
🗪
14:10 xanatos387 The source of the delay is that, in general, other signals are not immediately available: they come out of other combinatorial circuits. So you care about the total delay since the last flip-flop (or similar)
🗪
14:10 xanatos387 The source of the delay is that, in general, other signals are not immediately available: they come out of other combinatorial circuits. So you care about the total delay since the last flip-flop (or similar)
🗪
14:36Simulation and language processing
🗩
14:36Simulation and language processing
🗩
14:36Simulation and language processing
🗩
17:26How modules are defined
📖
17:26How modules are defined
📖
17:26How modules are defined
📖
20:16Set up to define a Copier Visitor for all our node types
🗩
20:16Set up to define a Copier Visitor for all our node types
🗩
20:16Set up to define a Copier Visitor for all our node types
🗩
24:46Handling cycles
🗩
24:46Handling cycles
🗩
24:46Handling cycles
🗩
26:50Define UnaryNode() and InputNode() Copier
26:50Define UnaryNode() and InputNode() Copier
26:50Define UnaryNode() and InputNode() Copier
29:29Trigger a "Cyclic node graph" error
29:29Trigger a "Cyclic node graph" error
29:29Trigger a "Cyclic node graph" error
30:07Enable the UnaryNode Copier to handle cycles
30:07Enable the UnaryNode Copier to handle cycles
30:07Enable the UnaryNode Copier to handle cycles
32:03Run it to see that it now works without error
🏃
32:03Run it to see that it now works without error
🏃
32:03Run it to see that it now works without error
🏃
33:04Make all the node initialisers take a type, rather than inferring it
33:04Make all the node initialisers take a type, rather than inferring it
33:04Make all the node initialisers take a type, rather than inferring it
37:23Define ConstantNode(), BinaryNode(), CompareNode() and OutputNode() Copiers
37:23Define ConstantNode(), BinaryNode(), CompareNode() and OutputNode() Copiers
37:23Define ConstantNode(), BinaryNode(), CompareNode() and OutputNode() Copiers
39:45Define InstanceInputNode(), InstanceOutputNode() and Module() Copiers
39:45Define InstanceInputNode(), InstanceOutputNode() and Module() Copiers
39:45Define InstanceInputNode(), InstanceOutputNode() and Module() Copiers
46:05Define ConcatNode(), IndexNode(), SliceNode() and WhenNode() Copiers
46:05Define ConcatNode(), IndexNode(), SliceNode() and WhenNode() Copiers
46:05Define ConcatNode(), IndexNode(), SliceNode() and WhenNode() Copiers
50:13Create Test module, define a set() Copier and introduce copy_module() and make_module()
50:13Create Test module, define a set() Copier and introduce copy_module() and make_module()
50:13Create Test module, define a set() Copier and introduce copy_module() and make_module()
58:11Test copy_module()
58:11Test copy_module()
58:11Test copy_module()
1:01:45Run it to see our module-level copy
🏃
1:01:45Run it to see our module-level copy
🏃
1:01:45Run it to see our module-level copy
🏃
1:02:05Create ModuleInliner()
1:02:05Create ModuleInliner()
1:02:05Create ModuleInliner()
1:15:06Introduce inline_module() and inline_top_module()
1:15:06Introduce inline_module() and inline_top_module()
1:15:06Introduce inline_module() and inline_top_module()
1:20:47Test inline_top_module() to see that it works
🏃
1:20:47Test inline_top_module() to see that it works
🏃
1:20:47Test inline_top_module() to see that it works
🏃
1:21:13Create Xor module for our Test to use
1:21:13Create Xor module for our Test to use
1:21:13Create Xor module for our Test to use
1:22:15Run it to see our encapsulated Xor sub-module
🏃
1:22:15Run it to see our encapsulated Xor sub-module
🏃
1:22:15Run it to see our encapsulated Xor sub-module
🏃
1:22:25Break into ModuleInliner and step through to InstanceOutputNode until realising that we need a default handler
🏃
1:22:25Break into ModuleInliner and step through to InstanceOutputNode until realising that we need a default handler
🏃
1:22:25Break into ModuleInliner and step through to InstanceOutputNode until realising that we need a default handler
🏃
1:23:52Define a default handler in ModuleInliner
1:23:52Define a default handler in ModuleInliner
1:23:52Define a default handler in ModuleInliner
1:25:00Continue to step through ModuleInliner to see that it seemed to work
🏃
1:25:00Continue to step through ModuleInliner to see that it seemed to work
🏃
1:25:00Continue to step through ModuleInliner to see that it seemed to work
🏃
1:27:47Consult our graph to see that it isn't right
🏃
1:27:47Consult our graph to see that it isn't right
🏃
1:27:47Consult our graph to see that it isn't right
🏃
1:28:36Change inline_module to return the output operand (not the node)
1:28:36Change inline_module to return the output operand (not the node)
1:28:36Change inline_module to return the output operand (not the node)
1:29:32Consult our graph to see that it worked
🏃
1:29:32Consult our graph to see that it worked
🏃
1:29:32Consult our graph to see that it worked
🏃
1:29:44 A def can have an __init__?
🗪
1:29:44 A def can have an __init__?
🗪
1:29:44 A def can have an __init__?
🗪
1:30:34 Can the other x and y inputs be removed?
🗪
1:30:34 Can the other x and y inputs be removed?
🗪
1:30:34 Can the other x and y inputs be removed?
🗪
1:30:50Consider how to prevent the original top-level inputs from being copied
🗩
1:30:50Consider how to prevent the original top-level inputs from being copied
🗩
1:30:50Consider how to prevent the original top-level inputs from being copied
🗩
1:32:54Step through ModuleInliner to see what's happening with the original inputs
🏃
1:32:54Step through ModuleInliner to see what's happening with the original inputs
🏃
1:32:54Step through ModuleInliner to see what's happening with the original inputs
🏃
1:36:24Dive into Test2 and determine that the inputs are not related to the ones that are externally hooked up
🏃
1:36:24Dive into Test2 and determine that the inputs are not related to the ones that are externally hooked up
🏃
1:36:24Dive into Test2 and determine that the inputs are not related to the ones that are externally hooked up
🏃
1:40:27Note that the input duplication is only related to the sub-module
🏃
1:40:27Note that the input duplication is only related to the sub-module
🏃
1:40:27Note that the input duplication is only related to the sub-module
🏃
1:41:01Change the Module() Copier to put the copied self(node) - as opposed to the original node - into the instance_inputs array
1:41:01Change the Module() Copier to put the copied self(node) - as opposed to the original node - into the instance_inputs array
1:41:01Change the Module() Copier to put the copied self(node) - as opposed to the original node - into the instance_inputs array
1:41:11Run it to see that that fixed it
🏃
1:41:11Run it to see that that fixed it
🏃
1:41:11Run it to see that that fixed it
🏃
1:42:13Create an And module for our Xor to use, and so test sub-module inlining
1:42:13Create an And module for our Xor to use, and so test sub-module inlining
1:42:13Create an And module for our Xor to use, and so test sub-module inlining
1:43:39Run it to see that that works, and reflect on the simplicity of our Copier
🏃
1:43:39Run it to see that that works, and reflect on the simplicity of our Copier
🏃
1:43:39Run it to see that that works, and reflect on the simplicity of our Copier
🏃
1:45:02Create CyclicTest module torture test
1:45:02Create CyclicTest module torture test
1:45:02Create CyclicTest module torture test
1:47:45Run it to see our cycle
🏃
1:47:45Run it to see our cycle
🏃
1:47:45Run it to see our cycle
🏃
1:48:13Test inlining the CyclicTest, hit a "Cyclic node graph" error and consider how to resolve it
1:48:13Test inlining the CyclicTest, hit a "Cyclic node graph" error and consider how to resolve it
1:48:13Test inlining the CyclicTest, hit a "Cyclic node graph" error and consider how to resolve it
1:51:12Create WireNode
1:51:12Create WireNode
1:51:12Create WireNode
1:54:02Test WireNode
1:54:02Test WireNode
1:54:02Test WireNode
1:55:25Run it and explain the idea behind wires
🏃
1:55:25Run it and explain the idea behind wires
🏃
1:55:25Run it and explain the idea behind wires
🏃
1:56:07Make the InstanceOutputNode() ModuleInliner use wires, and define a WireNode() Copier
1:56:07Make the InstanceOutputNode() ModuleInliner use wires, and define a WireNode() Copier
1:56:07Make the InstanceOutputNode() ModuleInliner use wires, and define a WireNode() Copier
1:57:30Run it on Test2 to see that nothing broke
🏃
1:57:30Run it on Test2 to see that nothing broke
🏃
1:57:30Run it on Test2 to see that nothing broke
🏃
1:58:20Run it on CyclicTest and see that the wires don't resolve our "Cyclic node graph" error
🏃
1:58:20Run it on CyclicTest and see that the wires don't resolve our "Cyclic node graph" error
🏃
1:58:20Run it on CyclicTest and see that the wires don't resolve our "Cyclic node graph" error
🏃
2:00:39Simplify the InstanceOutputNode() Copier and make the Module() Copier create temporary wires
2:00:39Simplify the InstanceOutputNode() Copier and make the Module() Copier create temporary wires
2:00:39Simplify the InstanceOutputNode() Copier and make the Module() Copier create temporary wires
2:04:14Step through the Copier to see how it all handles CyclicTest
🏃
2:04:14Step through the Copier to see how it all handles CyclicTest
🏃
2:04:14Step through the Copier to see how it all handles CyclicTest
🏃
2:04:58Change the Module() Copier to put the output items (rather than the connections) as wires into the instance_outputs array
2:04:58Change the Module() Copier to put the output items (rather than the connections) as wires into the instance_outputs array
2:04:58Change the Module() Copier to put the output items (rather than the connections) as wires into the instance_outputs array
2:05:24Continue to step through the Copier
🏃
2:05:24Continue to step through the Copier
🏃
2:05:24Continue to step through the Copier
🏃
2:08:13Change the Module() Copier to put all the result.items() into the instance_outputs array
2:08:13Change the Module() Copier to put all the result.items() into the instance_outputs array
2:08:13Change the Module() Copier to put all the result.items() into the instance_outputs array
2:08:54Run it to see that our cyclic module works
🏃
2:08:54Run it to see that our cyclic module works
🏃
2:08:54Run it to see that our cyclic module works
🏃
2:09:03Run it to see that our inlined cyclic module also works
🏃
2:09:03Run it to see that our inlined cyclic module also works
🏃
2:09:03Run it to see that our inlined cyclic module also works
🏃
2:09:26Create WireRemover using a newly introduced remove_wires()
2:09:26Create WireRemover using a newly introduced remove_wires()
2:09:26Create WireRemover using a newly introduced remove_wires()
2:10:54Test remove_wires() to see that that works too
🏃
2:10:54Test remove_wires() to see that that works too
🏃
2:10:54Test remove_wires() to see that that works too
🏃
2:11:58Wind it down with a mention of the After Hours streams
🗩
2:11:58Wind it down with a mention of the After Hours streams
🗩
2:11:58Wind it down with a mention of the After Hours streams
🗩