RISC-V Toolchain
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0:08Recap and set the stage for the day
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0:08Recap and set the stage for the day
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0:08Recap and set the stage for the day
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1:32Demo the new command line interface, with and without the -lazy flag
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1:32Demo the new command line interface, with and without the -lazy flag
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1:32Demo the new command line interface, with and without the -lazy flag
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3:05Review the new support for different backend targets
3:05Review the new support for different backend targets
3:05Review the new support for different backend targets
6:23A few words on appropriately deferring work
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6:23A few words on appropriately deferring work
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6:23A few words on appropriately deferring work
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7:52Continued review of the multiple backend target support
7:52Continued review of the multiple backend target support
7:52Continued review of the multiple backend target support
10:06Review the new support of conditional compilation of source files based on target
10:06Review the new support of conditional compilation of source files based on target
10:06Review the new support of conditional compilation of source files based on target
14:47Review the libc binding contributions from twicetimes
14:47Review the libc binding contributions from twicetimes
14:47Review the libc binding contributions from twicetimes
17:17Review the new Ion bindings of a subset of SDL, and full port of Noir to Ion
17:17Review the new Ion bindings of a subset of SDL, and full port of Noir to Ion
17:17Review the new Ion bindings of a subset of SDL, and full port of Noir to Ion
22:02Review Ion's destination-oriented varargs1
22:02Review Ion's destination-oriented varargs1
22:02Review Ion's destination-oriented varargs1
29:30Step in to test_va_list() to demo Ion's varargs
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29:30Step in to test_va_list() to demo Ion's varargs
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29:30Step in to test_va_list() to demo Ion's varargs
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30:44Explain the implementation of Ion's varargs
30:44Explain the implementation of Ion's varargs
30:44Explain the implementation of Ion's varargs
34:28Q&A
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34:28Q&A
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34:28Q&A
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35:00nothings2 If you have "foo.ion" and "foo_linux.ion" does it compile both on linux, or only the most specific?
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35:00nothings2 If you have "foo.ion" and "foo_linux.ion" does it compile both on linux, or only the most specific?
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35:00nothings2 If you have "foo.ion" and "foo_linux.ion" does it compile both on linux, or only the most specific?
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36:46nothings2 pervognsen We found it useful in cdep to have the ability to have a common file (e.g. for all POSIX systems) and then override only for some platforms, but I don't think you have that ability with your exclude system, which will use all files that match so you can't have a fallback?
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36:46nothings2 pervognsen We found it useful in cdep to have the ability to have a common file (e.g. for all POSIX systems) and then override only for some platforms, but I don't think you have that ability with your exclude system, which will use all files that match so you can't have a fallback?
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36:46nothings2 pervognsen We found it useful in cdep to have the ability to have a common file (e.g. for all POSIX systems) and then override only for some platforms, but I don't think you have that ability with your exclude system, which will use all files that match so you can't have a fallback?
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38:48Demo Ion's ability to temporarily exclude files
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38:48Demo Ion's ability to temporarily exclude files
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38:48Demo Ion's ability to temporarily exclude files
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40:47cmdrkroz pervognsen What about static constant booleans that cause conditional compilation (a la java, which doesn't compile bytecode for conditionals that are always false)
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40:47cmdrkroz pervognsen What about static constant booleans that cause conditional compilation (a la java, which doesn't compile bytecode for conditionals that are always false)
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40:47cmdrkroz pervognsen What about static constant booleans that cause conditional compilation (a la java, which doesn't compile bytecode for conditionals that are always false)
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43:21Set up to start work on RISC-V stuff,2 adding a "riscv" project to Visual Studio
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43:21Set up to start work on RISC-V stuff,2 adding a "riscv" project to Visual Studio
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43:21Set up to start work on RISC-V stuff,2 adding a "riscv" project to Visual Studio
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56:282.2 Base Instruction Formats3 of RISC-V vs x86
56:282.2 Base Instruction Formats3 of RISC-V vs x86
56:282.2 Base Instruction Formats3 of RISC-V vs x86
1:07:31Why are the function bits split across multiple positions?4
1:07:31Why are the function bits split across multiple positions?4
1:07:31Why are the function bits split across multiple positions?4
1:08:37xanatos387 Seems like its just to keep the rd / rs1 / rs2 always in the same spots?
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1:08:37xanatos387 Seems like its just to keep the rd / rs1 / rs2 always in the same spots?
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1:08:37xanatos387 Seems like its just to keep the rd / rs1 / rs2 always in the same spots?
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1:08:48nothings2 pervognsen I have no idea, I can't see any downside to swapping funct3 and rd
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1:08:48nothings2 pervognsen I have no idea, I can't see any downside to swapping funct3 and rd
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1:08:48nothings2 pervognsen I have no idea, I can't see any downside to swapping funct3 and rd
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1:09:35Different immediate fields in RISC-V's core instruction formats5
1:09:35Different immediate fields in RISC-V's core instruction formats5
1:09:35Different immediate fields in RISC-V's core instruction formats5
1:14:22rygorous It's usually "sign extend and then do something else" or "do something else then sign extend", so the sign extend is on the critical path
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1:14:22rygorous It's usually "sign extend and then do something else" or "do something else then sign extend", so the sign extend is on the critical path
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1:14:22rygorous It's usually "sign extend and then do something else" or "do something else then sign extend", so the sign extend is on the critical path
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1:14:30nothings2 It probably does get sign extended in 64-bit?
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1:14:30nothings2 It probably does get sign extended in 64-bit?
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1:14:30nothings2 It probably does get sign extended in 64-bit?
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1:15:122.3 Immediate Encoding Variants6
1:15:122.3 Immediate Encoding Variants6
1:15:122.3 Immediate Encoding Variants6
1:18:062.4 Integer Computational Instructions7 with a look at arithmetic right-shift of negative values in C8
1:18:062.4 Integer Computational Instructions7 with a look at arithmetic right-shift of negative values in C8
1:18:062.4 Integer Computational Instructions7 with a look at arithmetic right-shift of negative values in C8
1:24:24Demo the strange behaviour of arithmetic right-shift of -1
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1:24:24Demo the strange behaviour of arithmetic right-shift of -1
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1:24:24Demo the strange behaviour of arithmetic right-shift of -1
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1:26:212.4 Integer Computational Instructions, continued9
1:26:212.4 Integer Computational Instructions, continued9
1:26:212.4 Integer Computational Instructions, continued9
1:28:23LUI (load upper immediate)10, with a specific example of its use in conjunction with an addi
1:28:23LUI (load upper immediate)10, with a specific example of its use in conjunction with an addi
1:28:23LUI (load upper immediate)10, with a specific example of its use in conjunction with an addi
1:34:29rygorous The lo / hi stuff needs to account for the signedness of lo
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1:34:29rygorous The lo / hi stuff needs to account for the signedness of lo
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1:34:29rygorous The lo / hi stuff needs to account for the signedness of lo
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1:34:46rygorous i.e. if the %lo bits end up with the top bit (sign) set, you need to increment %hi by 1
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1:34:46rygorous i.e. if the %lo bits end up with the top bit (sign) set, you need to increment %hi by 1
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1:34:46rygorous i.e. if the %lo bits end up with the top bit (sign) set, you need to increment %hi by 1
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1:35:00Continued example of LUI, and AUIPC (add upper immediate to pc)11
1:35:00Continued example of LUI, and AUIPC (add upper immediate to pc)11
1:35:00Continued example of LUI, and AUIPC (add upper immediate to pc)11
1:38:25Integer Register-Register Operations, and 2.5 Control Transfer Instructions12
1:38:25Integer Register-Register Operations, and 2.5 Control Transfer Instructions12
1:38:25Integer Register-Register Operations, and 2.5 Control Transfer Instructions12
1:43:53"jump and link" in RISC-V13 vs "call and return" in x86
1:43:53"jump and link" in RISC-V13 vs "call and return" in x86
1:43:53"jump and link" in RISC-V13 vs "call and return" in x86
1:47:56Conditional Branches14, with a comparison with cmp then jle in x86
1:47:56Conditional Branches14, with a comparison with cmp then jle in x86
1:47:56Conditional Branches14, with a comparison with cmp then jle in x86
1:53:412.6 Load and Store Instructions15
1:53:412.6 Load and Store Instructions15
1:53:412.6 Load and Store Instructions15
2:03:18Load / Store instruction addressing modes in ARM, vs RISC-V's single "mode"16
2:03:18Load / Store instruction addressing modes in ARM, vs RISC-V's single "mode"16
2:03:18Load / Store instruction addressing modes in ARM, vs RISC-V's single "mode"16
2:05:19FENCE.I with an allusion to the Privileged spec,17 and 2.8 Control and Status Register Instructions18
2:05:19FENCE.I with an allusion to the Privileged spec,17 and 2.8 Control and Status Register Instructions18
2:05:19FENCE.I with an allusion to the Privileged spec,17 and 2.8 Control and Status Register Instructions18
2:10:39Wind it down with the determination to look further into the LUI and sign-extension stuff
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2:10:39Wind it down with the determination to look further into the LUI and sign-extension stuff
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2:10:39Wind it down with the determination to look further into the LUI and sign-extension stuff
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2:11:23Q&A
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2:11:23Q&A
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2:11:23Q&A
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2:12:06elventhief What's your coding approach going to start as?
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2:12:06elventhief What's your coding approach going to start as?
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2:12:06elventhief What's your coding approach going to start as?
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2:14:19miotatsu pervognsen You do just do lui followed by addi. I didn't know about the fix-up stuff Fabien mentioned but I am looking at binutils source right now and it looks like it %hi is doing the fix-up like what rygorous suggested earlier
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2:14:19miotatsu pervognsen You do just do lui followed by addi. I didn't know about the fix-up stuff Fabien mentioned but I am looking at binutils source right now and it looks like it %hi is doing the fix-up like what rygorous suggested earlier
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2:14:19miotatsu pervognsen You do just do lui followed by addi. I didn't know about the fix-up stuff Fabien mentioned but I am looking at binutils source right now and it looks like it %hi is doing the fix-up like what rygorous suggested earlier
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2:15:06That's it
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2:15:06That's it
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2:15:06That's it
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