Domain-Specific Languages In Python, Part 5 | Bitwise Episode Guide

0:06Recap and set the stage for the final stream in this portion of the series

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0:06Recap and set the stage for the final stream in this portion of the series

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0:06Recap and set the stage for the final stream in this portion of the series

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0:57Review newly added optional display of types and labelling of nodes to our DotGenerator

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0:57Review newly added optional display of types and labelling of nodes to our DotGenerator

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0:57Review newly added optional display of types and labelling of nodes to our DotGenerator

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4:19Review our new parity() circuit

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4:19Review our new parity() circuit

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4:19Review our new parity() circuit

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5:46Introduce parity2() as a naive way to XOR a collection of bits

7:46Run it to see our graph for parity2()

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7:46Run it to see our graph for parity2()

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7:46Run it to see our graph for parity2()

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9:43Run it on the original parity() to see our graph with logarithmic depth

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9:43Run it on the original parity() to see our graph with logarithmic depth

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9:43Run it on the original parity() to see our graph with logarithmic depth

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12:52Run it on LinearXorScanner8 and explain our graph for this

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12:52Run it on LinearXorScanner8 and explain our graph for this

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12:52Run it on LinearXorScanner8 and explain our graph for this

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17:56Compare the LinearXorScanner8 graph with that for Parity8

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17:56Compare the LinearXorScanner8 graph with that for Parity8

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17:56Compare the LinearXorScanner8 graph with that for Parity8

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18:35Run it on LogarithmicXorScanner8 and explain our graph for this

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18:35Run it on LogarithmicXorScanner8 and explain our graph for this

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18:35Run it on LogarithmicXorScanner8 and explain our graph for this

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19:55Walk through parity(), scan() and scan2(), with a mention of the Brent-Kung adder¹

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19:55Walk through parity(), scan() and scan2(), with a mention of the Brent-Kung adder¹

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19:55Walk through parity(), scan() and scan2(), with a mention of the Brent-Kung adder¹

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26:38Highlight the skewed fanout in our LogarithmicXorScanner8

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26:38Highlight the skewed fanout in our LogarithmicXorScanner8

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26:38Highlight the skewed fanout in our LogarithmicXorScanner8

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28:00Generate a 32-bit LogarithmicXorScanner8 circuit and check out the skewed fanout in its graph

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28:00Generate a 32-bit LogarithmicXorScanner8 circuit and check out the skewed fanout in its graph

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28:00Generate a 32-bit LogarithmicXorScanner8 circuit and check out the skewed fanout in its graph

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29:39Consider expanding our vocabulary with when() and case(), and optimising our graph visualisation

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29:39Consider expanding our vocabulary with when() and case(), and optimising our graph visualisation

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29:39Consider expanding our vocabulary with when() and case(), and optimising our graph visualisation

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32:46Flattening graph slices by short-circuiting the second level of a slice-of-a-slice

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32:46Flattening graph slices by short-circuiting the second level of a slice-of-a-slice

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32:46Flattening graph slices by short-circuiting the second level of a slice-of-a-slice

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34:58Enable IndexNode to flatten slices

36:21Run it to see that there might be a bug

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36:21Run it to see that there might be a bug

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36:21Run it to see that there might be a bug

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37:55Step in to IndexNode and inspect the data

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37:55Step in to IndexNode and inspect the data

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37:55Step in to IndexNode and inspect the data

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39:00Fix IndexNode to correctly flatten slices

39:38Run it to see that it looks better

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39:38Run it to see that it looks better

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39:38Run it to see that it looks better

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39:47Enable SliceNode to flatten slices of slices

40:30Run it to see our flattened slices of slices, and consider short-circuiting indexing into concatenations

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40:30Run it to see our flattened slices of slices, and consider short-circuiting indexing into concatenations

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40:30Run it to see our flattened slices of slices, and consider short-circuiting indexing into concatenations

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41:46Loft out the construction part of IndexNode and SliceNode to make_index() and make_slice() respectively

47:45Run it to see the same stuff we had before

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47:45Run it to see the same stuff we had before

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47:45Run it to see the same stuff we had before

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47:53Enable make_index() to short-circuit ConcatNode indexing

50:59Run it to see that some of it looks dubious

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50:59Run it to see that some of it looks dubious

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50:59Run it to see that some of it looks dubious

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51:59Consider our previous graph without short-circuiting of concatenation indexing

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51:59Consider our previous graph without short-circuiting of concatenation indexing

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51:59Consider our previous graph without short-circuiting of concatenation indexing

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52:34Continue to investigate why our concatenation indexing doesn't always get flattened

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52:34Continue to investigate why our concatenation indexing doesn't always get flattened

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52:34Continue to investigate why our concatenation indexing doesn't always get flattened

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59:12Enable make_index() to recursively apply flattening to ConcatNodes

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59:12Enable make_index() to recursively apply flattening to ConcatNodes

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59:12Enable make_index() to recursively apply flattening to ConcatNodes

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1:00:19Run it to see exactly what we wanted to see

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1:00:19Run it to see exactly what we wanted to see

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1:00:19Run it to see exactly what we wanted to see

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1:01:18Check out the fanout in a 32-bit LogarithmicXorScanner8 circuit

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1:01:18Check out the fanout in a 32-bit LogarithmicXorScanner8 circuit

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1:01:18Check out the fanout in a 32-bit LogarithmicXorScanner8 circuit

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1:04:15Incorporating registers, in the context of a Counter module

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1:04:15Incorporating registers, in the context of a Counter module

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1:04:15Incorporating registers, in the context of a Counter module

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1:09:34Introduce RegisterNode

1:13:36Introduce Counter module

1:14:28Run it to see our Counter circuit

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1:14:28Run it to see our Counter circuit

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1:14:28Run it to see our Counter circuit

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1:15:00Add a value to the RegisterNode()

1:15:11Run it to see our Counter circuit

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1:15:11Run it to see our Counter circuit

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1:15:11Run it to see our Counter circuit

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1:15:51Define __add__ and __radd__ operands for our Counter module to use

1:16:47Run it to see our Counter circuit, with a cycle

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1:16:47Run it to see our Counter circuit, with a cycle

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1:16:47Run it to see our Counter circuit, with a cycle

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1:17:07Add an increment input to our Counter module

1:17:30Run it to see the terrible layout of our Counter circuit

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1:17:30Run it to see the terrible layout of our Counter circuit

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1:17:30Run it to see the terrible layout of our Counter circuit

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1:18:10Change the inc input in our Counter module to an enable input which controls the count via a (newly introduced) WhenNode

1:25:34Run it see our Counter circuit with conditional operation

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1:25:34Run it see our Counter circuit with conditional operation

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1:25:34Run it see our Counter circuit with conditional operation

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1:26:55A few words on flipflop enables

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1:26:55A few words on flipflop enables

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1:26:55A few words on flipflop enables

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1:27:58Change our Counter module to contain a D-flipflop with builtin enable

1:29:26Run it to see this Counter module

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1:29:26Run it to see this Counter module

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1:29:26Run it to see this Counter module

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1:29:43That's probably enough, with a glimpse into next week's ordered introduction to hardware

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1:29:43That's probably enough, with a glimpse into next week's ordered introduction to hardware

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1:29:43That's probably enough, with a glimpse into next week's ordered introduction to hardware

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Bitwise

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