Hardware Design Overview
Filter mode:
Topics
circuit design
emulation
hardware design
language
logic design
peripheral
(null topic)
Media
🗩Speech🟉
?
?
W, K, P / S, J, N Jump to previous / next marker
t / T Toggle theatre / SUPERtheatre mode
V Revert filter to original state Y Select link (requires manual Ctrl-c)
X, ShiftSpace Toggle category and focus previous
v Invert topics / media as per focus
Keyboard Navigation
Global Keys
[, < / ], > Jump to previous / next episodeW, K, P / S, J, N Jump to previous / next marker
t / T Toggle theatre / SUPERtheatre mode
V Revert filter to original state Y Select link (requires manual Ctrl-c)
Menu toggling
q Quotes r References f Filter y Link c CreditsIn-Menu Movement
a
w
s
s
d
h
j
k
l
←
↑
↓
↓
→
Quotes and References Menus
Enter Jump to timecodeQuotes, References and Credits Menus
o Open URL (in new tab)Filter Menu
x, Space Toggle category and focus nextX, ShiftSpace Toggle category and focus previous
v Invert topics / media as per focus
Filter and Link Menus
z Toggle filter / linking modeCredits Menu
Enter Open URL (in new tab)⏫
Previous: 'Domain-Specific Languages In Python, Part 5'
⏫
0:08Recap and set the stage for the day's soft intro to hardware design
0:08Recap and set the stage for the day's soft intro to hardware design
0:08Recap and set the stage for the day's soft intro to hardware design
2:06Hardware design with a focus on logic design
2:06Hardware design with a focus on logic design
2:06Hardware design with a focus on logic design
4:50Goal: Design / implement simple CPUs
4:50Goal: Design / implement simple CPUs
4:50Goal: Design / implement simple CPUs
6:31Goal: Design / implement peripherals
6:31Goal: Design / implement peripherals
6:31Goal: Design / implement peripherals
11:32Goal: This will be done in simulation and deployed on FPGAs
11:32Goal: This will be done in simulation and deployed on FPGAs
11:32Goal: This will be done in simulation and deployed on FPGAs
13:27Goal: Teach logic design basics, starting with combinational ("purely functional") logic,1 sequential logic,2 how to design state machines, etc.
13:27Goal: Teach logic design basics, starting with combinational ("purely functional") logic,1 sequential logic,2 how to design state machines, etc.
13:27Goal: Teach logic design basics, starting with combinational ("purely functional") logic,1 sequential logic,2 how to design state machines, etc.
17:53Goal: Cover "textbook basics", like datapath circuits
17:53Goal: Cover "textbook basics", like datapath circuits
17:53Goal: Cover "textbook basics", like datapath circuits
19:24Goal: Design a hardware description language (HDL) based on these ideas
19:24Goal: Design a hardware description language (HDL) based on these ideas
19:24Goal: Design a hardware description language (HDL) based on these ideas
26:48Q&A
26:48Q&A
26:48Q&A
29:38Goal: Do fun exercises along the way, e.g. Pong implemented entirely in hardware, TIS-100,4 etc.
29:38Goal: Do fun exercises along the way, e.g. Pong implemented entirely in hardware, TIS-100,4 etc.
29:38Goal: Do fun exercises along the way, e.g. Pong implemented entirely in hardware, TIS-100,4 etc.
33:18Defer logic design until next time, with some summary thoughts on our approach to teaching hardware design
33:18Defer logic design until next time, with some summary thoughts on our approach to teaching hardware design
33:18Defer logic design until next time, with some summary thoughts on our approach to teaching hardware design
36:49Summarise our hardware design goals in the context of the project thus far
36:49Summarise our hardware design goals in the context of the project thus far
36:49Summarise our hardware design goals in the context of the project thus far
41:21Wind it down with thoughts on the hardware design stuff being the main motivation to do bitwise
41:21Wind it down with thoughts on the hardware design stuff being the main motivation to do bitwise
41:21Wind it down with thoughts on the hardware design stuff being the main motivation to do bitwise
⏬
Next: 'Logic Design'
⏬