Logic Design | Bitwise Episode Guide

0:00Recap and set the stage for the day on logic design

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0:00Recap and set the stage for the day on logic design

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0:00Recap and set the stage for the day on logic design

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2:10Introducing logic design, gates and operation cost

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2:10Introducing logic design, gates and operation cost

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2:10Introducing logic design, gates and operation cost

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7:39Set up to design and visualise a simple circuit fragment

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7:39Set up to design and visualise a simple circuit fragment

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7:39Set up to design and visualise a simple circuit fragment

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8:42Define Example1 module as a simple NOT circuit

10:40Run our Graphviz generator and checkout the graph for Example1

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10:40Run our Graphviz generator and checkout the graph for Example1

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10:40Run our Graphviz generator and checkout the graph for Example1

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11:16Add another NOT node to Example1

11:37Run it to see our additional NOT node

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11:37Run it to see our additional NOT node

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11:37Run it to see our additional NOT node

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11:42Building up circuits of primitives

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11:42Building up circuits of primitives

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11:42Building up circuits of primitives

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12:43Define Not module to show the possibility to replace builtin primitives

15:20Run it to see our graphed handwritten Not node

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15:20Run it to see our graphed handwritten Not node

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15:20Run it to see our graphed handwritten Not node

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17:45Change Example1 to contain two input nodes

18:53Run it to see our circuit with two inputs

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18:53Run it to see our circuit with two inputs

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18:53Run it to see our circuit with two inputs

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18:58Add two custom Not nodes to Example1

19:31Run it to see our custom Not nodes

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19:31Run it to see our custom Not nodes

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19:31Run it to see our custom Not nodes

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19:48Typical module hierarchy

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19:48Typical module hierarchy

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19:48Typical module hierarchy

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20:21Define Xor module for Not to use

22:02Run the Graphviz generator on all levels of our module hierarchy

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22:02Run the Graphviz generator on all levels of our module hierarchy

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22:02Run the Graphviz generator on all levels of our module hierarchy

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23:04Set up to demonstrate universality through generation of the circuit corresponding to a Python boolean function / table

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23:04Set up to demonstrate universality through generation of the circuit corresponding to a Python boolean function / table

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23:04Set up to demonstrate universality through generation of the circuit corresponding to a Python boolean function / table

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25:03Produce the formula for XOR from its truth table using the sum of products representation

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25:03Produce the formula for XOR from its truth table using the sum of products representation

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25:03Produce the formula for XOR from its truth table using the sum of products representation

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29:29Set up to create a general truth table-to-circuit converter

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29:29Set up to create a general truth table-to-circuit converter

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29:29Set up to create a general truth table-to-circuit converter

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31:56Introduce table_to_circuit(), reduce_or() and reduce_and()

38:23Test reduce_or()

38:50Run it to see that it does what you hope it does

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38:50Run it to see that it does what you hope it does

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38:50Run it to see that it does what you hope it does

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39:00Add a third input to our reduce_or() call in Example2

39:09Run it to see that it's incorrect

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39:09Run it to see that it's incorrect

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39:09Run it to see that it's incorrect

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39:29Fix typo in our reduce_or() call

39:39Run it to see our cascaded reduction of inputs

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39:39Run it to see our cascaded reduction of inputs

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39:39Run it to see our cascaded reduction of inputs

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40:21Test table_to_circuit()

41:02Run it to see our Xor circuit

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41:02Run it to see our Xor circuit

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41:02Run it to see our Xor circuit

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41:26Sum of products

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41:26Sum of products

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41:26Sum of products

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42:05Introduce tabulate() to turn a boolean function into its corresponding truth table

48:26Introduce function_to_circuit()

50:30Test function_to_circuit()

51:04Run it to see that it produces the minimal representation for an AND gate, but not an OR gate

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51:04Run it to see that it produces the minimal representation for an AND gate, but not an OR gate

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51:04Run it to see that it produces the minimal representation for an AND gate, but not an OR gate

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51:57Illustrate the wasteful (yet correct) nature of this OR circuit

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51:57Illustrate the wasteful (yet correct) nature of this OR circuit

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51:57Illustrate the wasteful (yet correct) nature of this OR circuit

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54:05Set up to illustrate the inability of sum of products to scale

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54:05Set up to illustrate the inability of sum of products to scale

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54:05Set up to illustrate the inability of sum of products to scale

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55:41Produce a three-input XOR circuit

56:45Run it to see our greater number of terms

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56:45Run it to see our greater number of terms

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56:45Run it to see our greater number of terms

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57:02Add a fourth input to our XOR circuit

57:18Run it to see our exponentially growing graph, noting that this is bound to happen with a two-level circuit

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57:18Run it to see our exponentially growing graph, noting that this is bound to happen with a two-level circuit

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57:18Run it to see our exponentially growing graph, noting that this is bound to happen with a two-level circuit

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58:52Summarise our establishment of universality

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58:52Summarise our establishment of universality

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58:52Summarise our establishment of universality

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59:50Q&A

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59:50Q&A

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59:50Q&A

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1:00:30Note the assumption that viewers are comfortable with programming

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1:00:30Note the assumption that viewers are comfortable with programming

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1:00:30Note the assumption that viewers are comfortable with programming

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1:02:02Set up to cover multiplexers and Shannon expansion

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1:02:02Set up to cover multiplexers and Shannon expansion

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1:02:02Set up to cover multiplexers and Shannon expansion

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1:02:55Define Example3 as a multiplexer using the "when" node

1:05:24Run it to see our "when" node

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1:05:24Run it to see our "when" node

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1:05:24Run it to see our "when" node

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1:06:33Define a custom When node

1:08:07Run it to see our custom sum-of-products When node

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1:08:07Run it to see our custom sum-of-products When node

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1:08:07Run it to see our custom sum-of-products When node

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1:08:31Hand write a more efficient When node

1:09:06Run it to see this more efficient representation

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1:09:06Run it to see this more efficient representation

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1:09:06Run it to see this more efficient representation

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1:10:54Shannon expansion¹

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1:10:54Shannon expansion¹

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1:10:54Shannon expansion¹

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1:16:19Introduce function_to_muxes() and expand()

1:21:04Test function_to_muxes()

1:22:33Run it to see our Shannon expanded AND circuit

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1:22:33Run it to see our Shannon expanded AND circuit

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1:22:33Run it to see our Shannon expanded AND circuit

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1:25:02Test function_to_muxes() on a multi-input XOR

1:26:29Run it to see our neat XOR circuit thanks to the implicit BDDs (binary decision diagrams) in our memoization

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1:26:29Run it to see our neat XOR circuit thanks to the implicit BDDs (binary decision diagrams) in our memoization

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1:26:29Run it to see our neat XOR circuit thanks to the implicit BDDs (binary decision diagrams) in our memoization

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1:27:17Temporarily disable memoization

1:27:39Run it to see our full exponential circuit, and consider its potential for memoization

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1:27:39Run it to see our full exponential circuit, and consider its potential for memoization

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1:27:39Run it to see our full exponential circuit, and consider its potential for memoization

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1:29:04Run it with our re-enabled memoization and consider the ready compaction of multiplexers thanks to binary decision diagrams²

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1:29:04Run it with our re-enabled memoization and consider the ready compaction of multiplexers thanks to binary decision diagrams²

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1:29:04Run it with our re-enabled memoization and consider the ready compaction of multiplexers thanks to binary decision diagrams²

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1:30:28Add a fifth input to our function_to_muxes() test

1:30:47Run it to see our compact circuit, and consider our ability to formally compare reduced BDDs of functions

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1:30:47Run it to see our compact circuit, and consider our ability to formally compare reduced BDDs of functions

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1:30:47Run it to see our compact circuit, and consider our ability to formally compare reduced BDDs of functions

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1:33:00Summarise the stream

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1:33:00Summarise the stream

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1:33:00Summarise the stream

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1:34:55Q&A

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1:34:55Q&A

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1:34:55Q&A

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1:35:06xanatos387 Are six input bits often utilized? It seems like most things would be like <=3 inputs, or eight or more inputs (bytes and beyond). Six just seems like an odd number, not even a power of 2!

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1:35:06xanatos387 Are six input bits often utilized? It seems like most things would be like <=3 inputs, or eight or more inputs (bytes and beyond). Six just seems like an odd number, not even a power of 2!

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1:35:06xanatos387 Are six input bits often utilized? It seems like most things would be like <=3 inputs, or eight or more inputs (bytes and beyond). Six just seems like an odd number, not even a power of 2!

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1:38:13quovadit Plans to implement circuit optimization algorithms?

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1:38:13quovadit Plans to implement circuit optimization algorithms?

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1:38:13quovadit Plans to implement circuit optimization algorithms?

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1:39:31That's it

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1:39:31That's it

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1:39:31That's it

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